With reference to FIG. 1 for a schematic view of a conventional shorting bar testing architecture of a dual gate cell panel, the dual gate cell panel 1 comprises a plurality of pixels P, a transistor switch Tn, an electrode E, a scan line gn, a data line Dn, a plurality of metal wires 101, 102 and a plurality of test pads 121, 122, wherein the pixels P are distributed in a pixel array on the dual gate cell panel 1, and each pixel P includes three sub-pixels including a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B. Gate, source and drain electrodes of the transistor switch Tn of a sub-pixel are coupled to the scan line gn, the data line Dn and the electrode E of the sub-pixel respectively, and the brightness of the color of each sub-pixel is controlled by one scan line gn and one data line Dn.
In the conventional shorting bar testing architecture of the dual gate cell panel 1, all scan lines gn are electrically coupled through the metal wire 101, and all data lines Dn are electrically coupled through the metal wire 102. The testing signal includes a scan signal source 111 and an image signal source 112, and the scan signal source 111 and the image signal source 112 are coupled to the test pad 121 of the metal wire 101 and the test pad 122 of the metal wire 102 respectively and outputted to the plurality of scan lines gn and the plurality of data lines Dn of the dual gate cell panel 1 in order to perform a display test of the dual gate cell panel 1.
When the scan signal source 111 drives and turns on the transistor switch Tn, the image signal source 112 will affect the operation of related devices, such that the dual gate cell panel 1 can display a color or a pattern as required. The color display principle of the dual gate cell panel 1 is a prior art, and thus will not be described here. Simply speaking, when the transistor switch Tn of the sub-pixel is turned on, the closer the voltage of an image signal 112 to the reference voltage (V-common), the brighter is the color of the sub-pixel. If the difference between the voltage of the image signal 112 and the reference voltage reaches a predetermined value, then the color of the sub-pixel will not be displayed. Wherein, if the reference voltage is equal to 5 volts, and if the voltage of the image signal 112 is equal to 4.9 volts or 5.1 volts, then a very bright color of the sub-pixel will be displayed. If the voltage of the image signal 112 is equal to 10 volts or 0 volt, then the color of the sub-pixel will not be displayed.
Since the dual gate cell panel 1 adopts the shorting bar testing architecture for performing the display test, all data lines Dn and all scan lines gn are electrically coupled together, and then the image signal source 112 and the scan signal source 111 are outputted respectively, so that the red, green and blue colors cannot be displayed individually. During the test, the red, green and blue colors cannot be displayed individually, so that some defects cannot be detected, and the undetected defective dual gate cell panel 1 will still go through the subsequent manufacturing process until a higher-precision product test is preformed, such defective dual gate cell panel 1 will be detected at that time, and then discarded or recycled. In other words, unnecessary manufacturing costs incurred after the display test of the defective dual gate cell panel 1 takes place is wasted.